Selection Guides
Clock Distribution Circuits and Audio Data Converters
Clock Distribution Circuits
Input
Level
LVCMOS
Output
Level
LVCMOS
Frequency
(MHz)
54 to 167
V
CC
(V)
3.3
Jitter
(Peak-to-Peak [P-P] or
Cycle-to-Cycle [C-C] )
60 ps Period Jitter
Output
Skew
(max)
(ps)
150
Char.
Temp.
(°C)
0 to 70
69
Device
Description
Programmable 3-PLL Clock Synthesizer/
Multiplier/Divider
Rambus
®
XDR™ Clock Generator
6 Output PLL Frequency Generator
1:5 PLL Clock Driver for General-
Purpose, SSC
1:8 Low-Power PLL Clock with
Two Banks, SSC
1:4 (Plus Feedback Pair) PLL Differential
Clock for DDR Apps, SSC
High Performance 1:10 Clock Buffer for
General Purpose Applications
General Purpose and PCI-X 1:4 Clock Buffer
400-MHz Direct Rambus Clock
Generator-Lite, SSC
400-MHz Direct Rambus Clock
Generator, SSC
533-MHz Direct Rambus Clock
Generator, SSC
Package(s)
TSSOP-20
Price
1
2.60
Programmable SSC
PLL Clock Buffers
CDCD5804
2
2
SSTL-2
LVTTL
LVTTL
LVTTL
SSTL-2/
LVTTL
LVTTL
TTL
CMOS
CMOS
CMOS
SSTL-2
LVTTL
LVTTL
LVTTL
SSTL-2
400 to 800
12 to 74
24 to 200
10 to 200
60 to 180
2.5
3 to 3.6
3.3
3.3
2.5
C-C: 30 ps (636 to 800 MHz);
C-C: 40 ps (400 to 635 MHz)
P-P: 150 ps (max)
C-C: 70 ps (typ)
(66 to 200 MHz)
C-C: ±100 ps
(66 to 200 MHz)
C-C: ±50 ps
(100 to 180 MHz)
—
—
C-C: 100 ps (400 MHz)
C-C: 50 ps (400 MHz)
C-C: 40 ps (533 MHz)
—
—
150
150
50
0 to 70
–40 to 85
–40 to 85
–40 to 85
–40 to 85
TSSOP-28
TSSOP-20
TSSOP-8,
SOIC-8
TSSOP-16,
SOIC-16
TSSOP-28
4.25
2.15
0.70
1.16
1.06
Clock Buffers/Drivers
1
Suggested
2
With
LVTTL
CMOS
RSL
3
RSL
3
RSL
3
0 to 200
0 to 140
300/400
267 to 400
267 to 533
2.5 to 3.3
3.3
1.8/3.3
3.3
3.3
170
< 100
—
—
—
–40 to 85
–40 to 85
0 to 85
–40 to 85
–40 to 85
TSSOP-24
TSSOP-8
TSSOP-16
SSOP-24
SSOP-24
2.05
1.10
1.59
1.64
1.89
Direct Rambus™
resale price in U.S. dollars in quantities of 1,000.
series output resistors.
3
Rambus signaling levels.
New products are listed in
bold red.
Audio Data Converters
Device
Description
W/int. Dual-PLL, for DAD/MPEG Systems
W/int. PLL, generate DAD/MPEG Clocks
W/internal VCXO and PLL
Low-Cost Audio DAC
Stereo Audio DAC w/ Wide Supply Range
Stereo Audio DAC w/ Headphone Amplifier
CMOS, Multilevel
∆Σ
w/Volume Control
Low-Cost Audio DAC w/Volume Control
Low-Cost Audio DAC w/Volume Control
Low-Cost Audio DAC w/Volume Control
Low-Cost Audio DAC w/Volume Control
Low-Cost Audio DAC w/Volume Control
Low-Cost Audio DAC w/Volume Control
PCM/DSD Compatible DAC
CMOS, Multilevel
∆Σ
w/Volume Control
CMOS, Multilevel
∆Σ
w/Volume Control
Low-Cost Audio DAC w/Volume Control
2
Suggested
Resolution
(Bits) (max)
24
24
24
16
18
18
24
24
24
24
24
24
24
24
24
24
24
Dynamic
Range (dB)
92
94
94
95
96
96
96
98
100
100
105
105
105
106
106
106
106
Sampling Rate
(kHz) (max)
96
96
96
96
48
48
96
96
192
96
192
96
192
192
96
192
192
Configuration
Stereo
Stereo
Stereo
Stereo
Stereo
Stereo
Stereo
Stereo
Stereo
Stereo
Stereo
Stereo
Stereo
Stereo
Stereo
Stereo
Stereo
Audio Data
Format
1
Normal, I
2
S
Normal, I
2
S
Normal, I
2
S
Normal, I
2
S
Normal, I
2
S
Normal, I
2
S
Normal, I
2
S
Normal, I
2
S
Normal, I
2
S
Normal, I
2
S
Normal, I
2
S
Normal, I
2
S
Normal, I
2
S
Normal, I
2
S, DSD
Normal, I
2
S
Normal, I
2
S
Normal, I
2
S
Power
Supply (V)
+5
+5
+5
+5
+2.7 to +5.5
+5
+5
+3.3
+3.3 and +5
+3.3 and +5
+3.3 and +5
+3.3 and +5
+5
+3.3 and +5
+5
+3.3 and +5
+5
Package(s)
SSOP-24
SSOP-24
SSOP-24
SO-14
SSOP-20
SSOP-28
SSOP-20
SSOP-16
SSOP-16
SSOP-16
SSOP-16
SSOP-16
SSOP-16
SSOP-20
SSOP-28
SSOP-28
SSOP-16
Price
2
2.97
2.20
2.97
1.26
3.21
4.20
1.85
1.56
1.72
1.47
1.10
1.67
1.10
1.85
2.27
3.51
0.98
DACs
PCM1742K
PCM1748K
1
L
= left justified; R = right justified.
resale price in U.S. dollars in quantities of 1,000.
Preview products are listed in
bold blue.
Texas Instruments 1Q 2006
Audio Solutions Guide
➔