20
Home Theater Products
Shelf Systems/Minicompo
Stereo Audio DACs and Codecs
with USB Interface
PCM270x, PCM290x
Get samples, datasheets, evaluation modules and app reports at:
www.ti.com/sc/device/PARTnumber
(Replace
PARTnumber
with
or
➔
Digital Audio Processor
TAS3103A
Get samples, datasheets, evaluation modules and app reports at:
www.ti.com/sc/device/TAS3103A
The TAS3103A is a cost-effective, three-channel, 48-bit
digital audio processor with a 76-bit accumulator provid-
ing 540 MIPS of audio processing. It supports sample
rates from 8 to 96 kHz, and two ICs can be used for a six-channel
application gluelessly.
Key Features
• Eight input channels
• Three channels independently processed
• Input/output crossbar mixer
•
Channel mapping
• 3D effects block
•
BBE, Qsound, SRS, etc.
• Full bass management
• High-performance soft-volume, treble/bass
• High-performance compression/limiting
• 42-ms delay
• 12 bi-quads per channel
• Easy-to-use PC GUI controls
Applications
• Mini/micro component systems
• Home theater post-decode processing
• Automotive headunits/amps
The PCM270x family of single-chip USB stereo audio DACs and the
PCM290x family of single-chip USB stereo audio codecs both feature a
USB compliant full-speed protocol controller and S/PDIF. These devices
also employ SpAct™ architecture, TI’s unique system that recovers the
audio clock from USB packet data. On-chip analog PLLs with SpAct
enable playback with low clock jitter.
Key Features
• On-chip USB interface
• 16-bit delta-sigma stereo
• Sampling rate:
•
DAC: 32 to 48 kHz
•
ADC: 8 to 48 kHz
• On-chip clock generator with single 12-MHz clock source
• Packaging: 28-pin SSOP, Pb-Free
Applications
• USB audio speakers
• Audio interface boxes
VCCP VCCL VCCR VDD
PGND AGNDL AGNDR DGND ZGND
Power
Manager
SSPND
V
BUS
PLL, Oscillator,
Clocking Circuitry
Voltage
Regulation
Ch 1
Controller
Spectrum
Analyzer
5-V to 3.3-V
Voltage Regulator
VCOM
VOUTL
SDOUT1
SDIN2
SDIN3
SDIN4
8-Ch
I
2
S
Input
3D
Effects
Block
Ch 2
Ch 3
12 Cascaded
Biquad per Ch
Tone Control
Loudness
DRC/Expander
Delay
Dither
8-Ch
I
2
S
Output
with
Crossbar
Mixer
VOUTR
SDOUT2
Control
Endpoint
S/PDIF
Encoder
DOUT
SDOUT3
FIFO
TAS3103A block diagram.
PSEL
TEST0
TEST1
PLL (x8)
ISO-Out
Endpoint
EEPROM
Interface
XCVR
SDIN1
USB BIE
Channel
Processing Block
DAC
Analog
PLL
USB
Protocol
Controller
D+
D–
CK
DT
HOST
HIO
Endpoint
96
MHz
SPI
Interface
HIDO/NS
HID1/NC
HID2/ND
Tracker
(SpAct™)
XTI 12 MHz XTO
PCM270x block diagram.
Audio Solutions Guide
Texas Instruments 1Q 2006