SLA7042M/SLA7044M
sInternal
Block Diagram
VDD B
OUT B
OUT B
VDD A
OUT A
OUT A
sSerial
Data Pattern
OUT excitation (MODE
χ
)
OUT excitation (MODE
χ
)
Phase
CLOCK
a
b
c
0
Phase
a
b
c
0
STROBE
Reference voltage
b
Vref
c
a
0
0%
0
0
0
20%
0
1
1
40%
0
0
1
55.5%
0
1
0
71.4%
1
0
0
83%
1
1
1
91%
1
0
1
100%
1
1
Reference voltage
c
a
b
Vref
0
0
0
0%
0
1
0
20%
0
0
1
40%
0
1
1
55.5%
1
0
0
71.4%
1
1
0
83%
1
0
1
91%
1
1
1
100%
0
0
MODE0
(0%)
0
OFF time timer
(TOFF 3-step switching)
Chopper ON
Noise filter
(2
µ
s)
0
OFF time timer
(TOFF 3-step switching)
Chopper ON
Noise filter
(2
µ
s)
MODE1
(20%)
0
PWM
0
PWM
Phase
COMP
Reset
Ph.
Phase
Latch
a
b
c
c
Latch
b
a
Ph.
Reset
COMP
MODE2
(40%)
0
MODE3
(55.5%)
DATA
0
Reset
Shift register
Ph.
a
b
c
c
Shift register
b
a
Ph.
Reset
0
0
Enable
Enable
MODE4
(71.4%)
0
0
MODE5
(83%)
CLOCK A
STROBE B
DATA B
STROBE A
CLOCK B
DATA A
GND B
GND A
Ref B
Ref A
Rs B
Rs A
0
0
MODE6
(91%)
0
0
MODE7
(100%)
0
0
Successively output this serial data and set any
current. Then, determine the step
time of the reference voltage Vref with STROBE
signal intervals.
sDiagram
of Standard External Circuit
V
CC
sOutput
Current Formula
I
O
=
K V
REF
K:Reference voltage setting ratio by
3
R
S
serial signal (See the internal block
diagram)
⋅
5V
4
V
DD
A
ENABLE
V
REF
3
14
R
2
C
1
GND A GND B
7
12
C
1
: 500~10000pF
RS A
9
R
S
REF A
REF B
15
1
8
11
18
V
DD
B OUT A OUT A OUT B OUT B
CLOCK A 5
CLOCK B
R
1
SLA7042M
SLA7044M
16
2
13
STROBE A
STROBE B
DATA A
6
DATA B
17
RS B
10
R
S
sExternal
Dimensions (ZIP18 with Fin [SLA18Pin])
φ
3.2
±0.15
(Unit : mm)
31
±0.2
24.4
±0.2
16.4
±0.2
φ
3.2
±0.15
x3.8
4.8
±0.2
1.7
±0.1
9.9
±0.2
16
±0.2
13
±0.2
(3) 6.7
±0.5
0.55
+0.2
–0.1
1
–0.1
17xP1.68
±0.4
=28.56
±1
+0.2
0.65
–0.1
+0.2
1
–0.1
17xP1.68
±0.4
=28.56
±1
+0.2
0.55
–0.1
4
±0.7
+0.2
2.2
±0.1
6
±0.6
7.5
±0.6
31.3
±0.2
1 2 3
. . . . . . . . . . . .
16 17 18
1 2 3
. . . . . . . . . . .
16 1718
Forming No. No.871
Forming No. No.872
ICs
1.6
±0.6
R-End
9.7
–0.1
+0.2
0.65
–0.1
+0.2
3
±0.6
±0.6
4.6
Part No.
Lot No.
2.45
±0.2
111