SLA7060M/SLA7061M/SLA7062M
sInternal
Block Diagram
CW/CCW
Reset
OutB/
OutB/
OutA/
OutA/
Clock
OutB
OutB
OutA
OutA
REF
V
DD
sPin
Assignment
Pin No.
1
2
21
V
BB
Symbol
OutA
OutA
SenseA
V
DD
REF
Reset
CW/CCW
Clock
GND
M2
M1
M
O
Sync
V
BB
SenseB
OutB
OutB
Phase A output
Phase A output
Function
M
O
M1
M2
1
2
3
4
7
6
14 13 12
9 10
8
16
Reg
18
19 20
3
4
5
6
MIC
Pre-
Driver
Sequencer
&
Sleep Circuit
Phase A current sense
Logic supply
Control current setting & output OFF control input
Internal logic reset input
Normal/reverse control input
Step Clock input
Device GND
Excitation mode setting input
2-phase excitation state monitor output
PWM control signal input
Driver supply (motor supply)
Phase B current sense
Phase B output
Phase B output
Pre-
Driver
7
8
9
10
DAC
+
DAC
Synchro
Control
PWM
Control
PWM
Control
+
11
12
13
17
OSC
5
SenseA
15 Sync
GND 11
OSC
14
15
16
17
18
19
20
21
SenseB
sTypical
Connection Diagram
V
BB
=VM=10~44V
CA
V
DD
=3.0~5.5V
Disable
Q1
Reset
CW/CCW
CB
Clock
M2
Micro-
computer,
M1
etc.
M
O
Sync
R1
C1
* V
DD
line noise precaution:
The device may malfunction if the V
DD
line noise exceeds 0.5V. As a coun-
termeasure, separating the V
DD
system GND (S-GND) and V
BB
system
GND (P-GND) from the device GND (Pin-11) helps to reduce noise.
* Be sure to connect the unused logic input terminals (CW/CCW, M1, M2,
Reset, Sync) to V
DD
or GND.
Otherwise, the device will malfunction.
OutA/
OutB/
OutA
OutB
V
BB
6
8
9
10
12
13
14
15
7
16
1
2
3
4
18
19
20
21
SLA7060M
Series
5
SenseA
11
17
SenseB
* Be sure to open the unused logic output terminal Mo.
REF
R3
R2
RsA
RsB
GND
S-GND
P-GND
Component Values (Typical)
.
Rs=0.1 to 2Ω (Power dissipation should be: P= I
O 2
×Rs)
.
R1=10kWΩ
CA=100
µ
F/50V
R2=5.1kΩ (VR)
CB=10
µ
F/10V
R3=10kΩ
C1=0.1
µ
F
sExternal
Dimensions (ZIP21 with Fin [SLA21Pin])
31.0
±0.2
24.4
±0.2
16.4
±0.2
Gate burr
31.0
±0.2
(Unit : mm)
φ
3.2
±0.15
×3.8
4.8
±0.2
1.7
±0.1
24.4
±0.2
16.4
±0.2
Gate burr
φ
3.2
±0.15
×3.8
4.8
±0.2
1.7
±0.1
3
±0.5
[Measured at the tip]
[4.6]
1.6
±0.5
[Measured at the tip]
16
±0.2
[Heatsink]
12.9
±0.2
9.9
±0.2
17.9
±0.6
5
±0.5
4
[R1]
R-end
0.65
–0.1
20×P1.43
±0.5
=28.6
±1
[Measured at the tip]
+0.2
9.9
±0.2
2.45
±0.2
[Measured at the root]
12.9
±0.2
16
±0.2
[Heatsink]
φ
3.2
±0.15
φ
3.2
±0.15
2.45
±0.2
[Measured
at the root]
4.2MIN
0.55
–0.1
4
±0.7
+0.2
20×P1.43
±0.5
=28.6
±0.7
[Measured at the tip]
6
±0.6
7.5
±0.6
[Measured at the tip]
31.3
±0.2
[Including the resin burr]
31.3
±0.2
[Including the resin burr]
0.65
–0.1
1
2
3
4
5
6
7
8
9
11 13 15 17 19 21
10 12 14 16 18 20
+0.2
Forming No. No.2102
1
2
3
4
5
6
7
8
9
11 13 15 17 19 21
10 12 14 16 18 20
Forming No. No.2104
0.55
–0.1
+0.2
ICs
115
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