1-1-1 Linear Regulator ICs
SI-3000R Series
5-Terminal, Built-in Reset Function, Full-Mold, Low Dropout Voltage Linear Regulator ICs
sFeatures
• Reset signal output (When the output voltage
rises, a reset signal is output to secure the
normal operation of the system. When the
output voltage decreases, the reset signal is
also output to protect the system.)
• Reset signal detection output voltage level Voth
is 92% of output voltage in the standard
specification. Models with different setting
values for different needs are scheduled to be
added to the series.
• Delay time for reset signal can be set freely by
external capacitor
• Compact full-mold package (equivalent to
TO220)
• Output current: 1.5A
• Low dropout voltage :V
DIF
≤
1V (at I
O
=1.5A)
Applicable to battery driven equipment with
built-in microcomputer.
• Built-in drooping-type-overcurrent, input-
overvoltage and thermal protection circuits
• Low circuit current I
D
=typ.1.5mA (I
O
=0A)
sAbsolute
Maximum Ratings
Parameter
DC Input Voltage
Voltage of Rest Signal Output Terminal
DC Output Current
Power Dissipation
Junction Temperature
Operating Ambient Temperature
Storage Temperature
Thermal Resistance (junction to case)
Thermal Resistance (junction to ambient air)
Symbol
V
IN
V
RST
I
O
P
D1
P
D2
T
j
T
OP
T
stg
Ratings
SI-3050R
35
V
IN
1.5
*1
18(With infinite heatsink)
1.5(Without heatsink, stand-alone operation)
–30 to +125
–30 to +100
–30 to +125
5.5
66.7(Without heatsink, stand-alone operation)
(T
a
=25°C)
Unit
V
V
A
W
W
°C
°C
°C
°C/W
°C/W
θ
j-c
θ
j-a
sApplications
• Microcomputer-controlled equipment
• Battery-driven micro-computer-controlled
equipment
sElectrical
Characteristics
Ratings
Parameter
Input Voltage
Output Voltage
Symbol
min.
V
IN
V
O
Conditions
V
DIF
Conditions
Dropout Voltage
Conditions
Line Regulation
Load Regulation
Ripple Rejection
Quiescent Circuit Current
Overcurrent Protection Starting
Current (Drooping Type)
Current Limit at Output Short
Circuit
DLY
Terminal
Threshold
Source
∆V
OLINE
Conditions
∆V
OLOAD
Conditions
R
REJ
Conditions
I
q
Conditions
I
S1
Conditions
I
S2
Conditions
V
DLyth
I
DLY
V
oth
/V
O
∆V
oth
V
RSTH
V
RSTL
I
RSTH
I
RSTL
–16
2.7
25
90
50
V
CC
–1
1.6
V
IN
=8V
2.9
35
92
100
1.6
V
IN
=8V
V
IN
=8V, I
O
=0 to 1.5A
54
V
IN
=8V, f=100 to 120H
Z
1.5
V
IN
=8V, I
O
=0A
V
IN
=6 to 15V, I
O
=1.0A
I
O
≤1.0A
6
*2
4.80
5.00
V
IN
=8V, I
O
=1.0A
SI-3050R
typ.
(T
a
=25°C unless otherwise specified)
Unit
max.
30
*1
5.20
V
0.5
1.0
I
O
≤1.5A
30
mV
100
mV
dB
5.0
mA
A
A
3.1
45
94
150
0.8
–20
V
V
V
µ
A
%
mV
V
V
Reset Threshold Voltage Level
(Voth: Threshold Output Voltage)
Reset Threshold Voltage Hysteresis
H-level Output Voltage
V
C
Terminal
*4
L-level Output Voltage
Sink Current at H level
Source Current at L level
µ
A
mA
*1:
*2:
*3:
*4:
V
IN(max)
and I
O(max)
are restricted by the relation P
D(max)
=(V
IN
-V
O
)•I
O
=18(W).
Refer to the Dropout Voltage parameter. (Refer to Setting D
C
Input Voltage on page 7.)
I
S
1 is specified at the 5% drop point of output voltage V
O
on the condition that V
IN
=8V, I
O
=1.0A.
Reset signal output terminal V
RST
is an open-collector output. Use a pull-up resistor when connecting it to a logic circuit.
38
ICs