Dropper Type System Regulator ICs
[Surface-mount 2-output]
SPF3004
Features
●
Single input dual output (ch1: 5V/0.4A, ch2: 3.3V/0.2A)
●
Power on reset function
●
Watchdog timer
●
Built-in drooping type overcurrent and thermal protection circuits (ch1)
External Dimensions
(unit: mm)
12.2
±0.2
10.5
±0.2
16
9
1.0
–0.05
Fin
thickness
+0.1
Parameter
DC input voltage
Output control terminal voltage
Output current
CH1
CH2
Symbol
V
IN
EN
I
o1
I
o2
MODE
W/D/C
TC
CK
Vo1-fail
RESET
Tj
Tstg
j-c
j-a
Ratings
–13 to 35
40
–0.3 to 35
40
0.4
0.2
Unit
V
V
A
400mS
400mS
Remarks
Reverse connection 1 min max.
1
1.27
±0.25
+0.15
0.4
–0.05
8
2.5
±0.2
0.25
– 0.05
+0.15
MODE terminal input voltage
W/D/C terminal input voltage
TC terminal input voltage
CK terminal input voltage
Vo1-fail terminal output voltage
Reset terminal output voltage
Junction temperature
Storage temperature
Thermal resistance
(junction to case)
Thermal resistance
(junction to ambient air)
–0.3 to 7
V
Standard Connection Diagram
–40 to 150
–40 to 150
4.1
38
°C
°C
°C/W
°C/W
With infinite heatsink
With glass epoxy + copper foil board (size 5.0 x 7.4cm;
t: glass epoxy = 1.6mm/copper foil = 18µm)
Battery
Vin
EN
D1
Vo1
SPF3004
Cin
Vo1
Vo1 fail
+
MODE
Vo2
+
RESET
W/D/C
CK
TC
Co1
Load
GND
Electrical Characteristics
Parameter
Input voltage
CH1
Output voltage
CH1
CH2
Dropout voltage
CH1
CH1
CH2
CH1
CH2
Symbol
V
IN
Vo1
Vo1
Vo2
V
DIF
11
V
DIF
12
V
DIF
2
R
REJ
1
R
REJ
2
Iq
I
GND
Is11
Is21
Is21
Is22
V
ENth
min
Vo1+V
DIF1
*
3
4.90
4.85
3.15
Ratings
typ
5.00
5.00
3.30
D2
max
35
*
4
5.10
5.15
3.45
0.5
0.25
0.5
Unit
V
Conditions
V
IN
= Vo1+V
DIF
1 to 18V,
Io1 = 0 to 0.4A, Tj = –40 to 125°C
V
IN
= Vo1+V
DIF
1 to 18V,
Io1 = 0 to 0.4A, Tj = –40 to 150°C
V
IN
= Vo2+V
DIF
1+V
DIF
2 to 18V,
Io1 = 0 to 0.2A
V
Rtc
+
Co2
Load
+
Ctc
V
Io1 = 0.4A
Io1 = 0.2A, Tj = 25°C
Io2 = 0.2A
f = 100 to 200Hz
V
IN
= 16V, EN = 0V
V
IN
= 35V, EN = 0V
Io1 = Io2 = 0.2A
Vo1 = 4.5V
Vo2 = 2.8V
Vo1 = 0V
Vo2 = 0V
Tj = –40 to 125°C
Ripple rejection
Quiescent circuit current
GND current
54
54
10
50
5
70
0.402
0.201
0.402
0.201
1.0
0.9
db
50
250
10
100
1.80
0.80
1.80
0.80
3.5
3.5
50
30
1.0
0.5
µA
mA
mA
A
A
V
µA
V
V
V
V
V
V
V
V
V
V
S
S
S
V
Cin: Capacitor (39µF) for oscillation prevention
C
O
1: Output capacitor (39µF)
C
O
2: Output capacitor (39µF)
Tantalum capacitors are recommended especially for low
temperatures.
D1, D2: Protection diodes.
Required as protection against reverse biasing between input
and output (Recommended diode: SANKEN EU2Z).
Overcurrent protection
CH1
starting current
CH2
CH1
Residual current
at a short
CH2
EN output control voltage
Timing Chart
Vin
EN
Vo1thH
Vo1thL
EN (ON) operation
EN (OFF) operation
*
8
EN = 6.4V, Tj = –40 to 125°C
EN = 3.51V, Tj = –40 to 125°C
EN = 0V, Tj = –40 to 125°C
Isink = 250µA, (Pull-up resistance 20kΩ typ)
Isource = 15µA
Isink = 250µA, (Pull-up resistance 20kΩ typ)
Isource = 15µA
Vrs, Vfail 4.5V
Vrs, Vfail 0.8V
Vrs 3.0V
Vrs 0.8V
∆Vo1th
= Vo1thH-Vo1thL
∆Vo2th
= Vo2thH-Vo2thL
Min. set time: 6mS
Min. set time: 4mS
Min. set time: 400µS
EN output control
current
ON
OFF
Vo1-fail terminal LOW voltage
Vo1-fail terminal HI voltage
Reset terminal LOW voltage
Reset terminal HI voltage
CH1
Reset detect voltage
CH2
18
CH1
CH2
Power on reset delay time
W/D time
W/D pulse time
MODE terminal control voltage
MODE = 5V
ON
MODE terminal
µA
control current
MODE = 0V, Tj = –40 to 125°C
OFF
V
W/D/C terminal control voltage
*
7
W/D/C = 5V
ON
W/D/C terminal
µA
control current
W/D/C = 0V, Tj = –40 to 125°C
OFF
V
Min. clock pulse time = 5µS (Duty 50%)
CK terminal control voltage
CK = 5V
ON
CK terminal control
µA
current
CK = 0V, Tj = –40 to 125°C
OFF
Notes:
*3: Refer to dropout voltage.
*4: Since P
D
(max)
= {(V
IN
–V
O
1) • (I
O
1+ I
O
2)} + (V
IN
• Iq) + {(V
O
1–V
O
2) • I
O
2 } = 30W, V
IN
(max), I
O
1(max) and I
O
2(max) may be limited
depending on operating conditions.
*5: The Vo1-fail and RESET terminals are pulled up in the IC; may be directly connected to logic circuits.
*6: The thermal protection function is built in V
O1
(CH1 side) only. The design thermal protection starting temperature is 155
°C
(min.) and 165°C (typ). These values represent the design warranty.
*7: The threshold voltage at the W/D/C terminals is determined by the presence/absence of WD operation (occurrence of
RESET signal pulses). The W/D/C function is assumed to be OFF during the period when RESET pulses occur.
*8: The TOFF-EN operation (VEN: 5V 0V) for Tj=150°C is 16mS (0.32V/mS) max.
Reset detect voltage
hysteresis width
I
ENH
1
I
ENH
2
–1.0
I
ENL
V
fail
L
V
fail
H
Vo1–0.8V
*
5
0.5
V
RS
L
V
RS
H
Vo1–0.8V
*
5
Vo1thH
Vo1 • 0.97
Vo1thL
4.05
Vo2thH
Vo2 • 0.985
Vo2thL
3.00
∆Vo1th
0.255
∆Vo2th
0.105
t
dly
0.70 • Rtc • Ctc 0.72 • Rtc • Ctc 0.74 • Rtc • Ctc
0.52 • Rtc • Ctc 0.54 • Rtc • Ctc 0.56 • Rtc • Ctc
t
wd
0.04 • Rtc • Ctc 0.06 • Rtc • Ctc 0.08 • Rtc • Ctc
t
wdp
Vmodeth
1.0
3.0
ImodeH
200
ImodeL
1.0
–1.0
Vw/d/cth
3.0
1.0
Iw/d/cH
200
Iw/d/cL
1.0
–1.0
Vckth
3.0
1.0
IckH
200
IckL
1.0
–1.0
OCP
operation
Reset
operation
Vo1
Vo1 fail
(Vo1 pull-up)
OCP
operation
Reset
operation
Vo2
MODE
Vo2thH
Vo2thL
(Vo1 system connection)
Open status
Vmodeth
Vo1 pull-up status
TC
(3.3 pull-up)
tdly
twd
twdp
Open status
RESET
W/D/C
CK
tdly
tdly-twdp
(Vo1 system connection)
W/D
Stop period
2.0
–0.8
+0.2
Absolute Maximum Ratings
(Ta=25ºC)
7.5
±0.2