LCD Type MCU
Universal Asynchronous Receiver/Transmitter
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UART
This section applies only to the HT49RU80/HT49CU80 which are the only devices in the series
that have an internal UART function. The HT49RU80/HT49CU80 devices contain an integrated
full-duplex asynchronous serial communications UART interface that enables communication
with external devices that contain a serial interface. The UART function has many features and
can transmit and receive data serially by transferring a frame of data with eight or nine data bits per
transmission as well as being able to detect errors when the data is overwritten or incorrectly
framed. The UART function possesses its own internal interrupt which can be used to indicate
when a reception occurs or when a transmission terminates.
UART Features
The integrated UART function contains the following features:
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Full-duplex, Asynchronous Communication
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8 or 9 Bits Character Length
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Even, Odd or No Parity Options
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One or Two Stop Bits
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Baud Rate Generator with 8-bit Prescaler
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Parity, Framing, Noise and Overrun Error Detection
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Support for Interrupt on Address Detect (Last Character bit=1)
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Separately Enabled Transmitter and Receiver
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2-byte Deep FIFO Receive Data Buffer
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Transmit and Receive Interrupts
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Interrupts Can be Initialized by the Following Conditions:
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Transmitter Empty
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Transmitter Idle
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Receiver Full
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Receiver Overrun
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Address Mode Detect
UART External Pin Interfacing
To communicate with an external serial interface, the internal UART has two external pins known
as TX and RX. The TX pin is the UART transmitter pin, which can be used as a general purpose
I/O pin if the pin is not configured as a UART transmitter, which occurs when the TXEN bit in the
UCR2 control register is equal to zero. Similarly, the RX pin is the UART receiver pin, which can
also be used as a general purpose I/O pin, if the pin is not configured as a receiver, which occurs if
the RXEN bit in the UCR2 register is equal to zero. Along with the UARTEN bit, the TXEN and
RXEN bits, if set, will automatically setup these I/O pins to their respective TX output and RX input
conditions and disable any pull-high resistor option which may exist on the RX pin.
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