LCD Type MCU
The various interrupt enable bits, together with their associated request flags, are shown in the fol-
lowing diagram with their order of priority.
A u to m a tic a lly C le a r e d b y IS R
M a n u a lly S e t o r C le a r e d b y S o ftw a r e
E x te rn a l In te rru p t
R e q u e s t F la g E IF 0
E x te rn a l In te rru p t
R e q u e s t F la g E IF 1
T im e r /E v e n t C o u n te r
In te r r u p t R e q u e s t F la g T F
T im e B a s e
In te r r u p t R e q u e s t F la g T B F
R e a l T im e C lo c k
In te r r u p t R e q u e s t F la g R T F
E E I0
A u to m a tic a lly D is a b le d b y IS R
C a n b e E n a b le d M a n u a lly
P r io r ity
E M I
H ig h
E E I1
E T I
In te rru p t
P o llin g
E T B I
E R T I
L o w
Interrupt Scheme
-
HT49R30A-1/HT49C30-1/HT49C30L
A u to m a tic a lly C le a r e d b y IS R
M a n u a lly S e t o r C le a r e d b y S o ftw a r e
E x te rn a l In te rru p t
R e q u e s t F la g E IF 0
E x te rn a l In te rru p t
R e q u e s t F la g E IF 1
T im e r /E v e n t C o u n te r 0
In te r r u p t R e q u e s t F la g T 0 F
T im e r /E v e n t C o u n te r 1
In te r r u p t R e q u e s t F la g T 1 F
T im e B a s e
In te r r u p t R e q u e s t F la g T B F
R e a l T im e C lo c k
In te r r u p t R e q u e s t F la g R T F
E E I0
A u to m a tic a lly D is a b le d b y IS R
C a n b e E n a b le d M a n u a lly
P r io r ity
E M I
H ig h
E E I1
E T 0 I
In te rru p t
P o llin g
E T 1 I
E T B I
E R T I
L o w
Interrupt Scheme
-
HT49R50A-1/HT49C50-1/HT49C50L
HT49R70A-1/HT49C70-1/HT49C70L
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