In addition, on entering an interrupt sequence or executing a subroutine call, the status register
will not be pushed onto the stack automatically. If the contents of the status registers are important
and if the subroutine can corrupt the status register, precautions must be taken to correctly save it.
b 7
b 0
S T A T U S R e g is te r
A r ith m e tic /L o g ic O p e r a tio n F la g s
C a r r y fla g
A u x ilia r y c a r r y fla g
Z e r o fla g
O v e r flo w fla g
S y s te m M a n a g e m e n t F la g s
P o w e r d o w n fla g
W a tc h d o g tim e - o u t fla g
N o t im p le m e n te d , r e a d a s " 0 "
Interrupt Control Registers
These 8-bit registers, known as INTC0, INTC1 and MFIC, control the operation of both the exter-
nal and internal interrupts. By setting various bits within these registers using standard bit manipu-
lation instructions, the enable/disable function of the external interrupts and each of the internal
interrupts can be independently controlled. A master interrupt bit within these two registers, the
EMI bit, acts like a global enable/disable and is used to set all of the interrupt enable bits on or off.
This bit is cleared when an interrupt routine is entered to disable further interrupt and is set by exe-
cuting the
In situations where other interrupts may require servicing within present interrupt service routines,
the EMI bit can be manually set by the program after the present interrupt service routine has been
Timer/Event Counter Registers
Depending upon which device is selected, all devices contain one, two or three integrated
Timer/Event Counters of either 8-bit or 16-bit size. For the HT49R30A-1/HT49C30-1/HT49C30L
devices, which have a single 8-bit Timer/Event Counter, an associated register, known as TMR is
the location where the timer¢s 8-bit value is located. An associated control register, known as
TMRC, contains the setup information for this timer. For the HT49R50A-1/HT49C50-1/HT49C50L
devices, which contain two 8-bit Timer/Event Counters, two registers, known as TMR0 and TMR1,
are used to store the timer¢s 8-bit values. A pair of associated registers, known as TMR0C and
TMR1C, contain the setup information for these two timers. For the HT49R70A-1/HT49C70-1/
HT49C70L devices, which contain a single 8-bit Timer/Event Counter with an associated register
known as TMR0, and a single 16-bit Timer/Event Counter with an associated register pair known
as TMR1L/TMR1H, where the timer¢s values are located. Two associated control registers, known
as TMR0C and TMR1C contain the setup information for these two timers. The HT49RU80/
HT49CU80 devices contain an 8-bit Timer/Event Counter with an associated timer register known
as TMR0, and two 16-bit Timer/Event Counters with associated timer register pairs known as
TMR1L/TMR1H and TMR2L/TMR2H. Their associated control registers are known as TMR0C,
TMR1C and TMR2C. Note that all timer registers can be directly written to in order to preload their
contents with fixed data to allow different time intervals to be setup.
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