Chapter 1 Hardware Structure
b 7
L V D O
Q O S C
L V D C
R T 2
R T 1
b 0
R T 0
R e a l T im e C lo c k C o n tr o l R e g is te r
R T C C
R T C
R T 2
0
0
0
0
1
1
1
1
In te r r u p t P e r io d
R T 0
R T 1
0
0
1
0
0
1
1
1
0
0
1
0
0
1
1
1
P e
2
8
2
9
2
1
2
1
2
1
2
1
2
1
2
1
r io d
/f
S
/f
S
0
/f
S
1
/f
S
2
/f
S
3
/f
S
4
/f
S
5
/f
S
L o w V o lta g e D e te c to r C o n tr o l
1 : e n a b le
0 : d is a b le
R T C O s c illa to r Q u ic k - s ta r t
1 : d is a b le
0 : e n a b le
L o w V o lta g e D e te c to r O u tp u t
1 : lo w v o lta g e d e te c te d
0 : n o r m a l v o lta g e
N o t im p le m e n te d , r e a d a s " 0 "
Status Register
-
STATUS
This 8-bit register (0AH) contains the zero flag (Z), carry flag (C), auxiliary carry flag (AC), overflow
flag (OV), Power Down flag (PDF), and Watchdog time-out flag (TO). It also records the status in-
formation and controls the operation sequence.
With the exception of the TO and PDF flags, bits in the status register can be altered by instruc-
tions like most other registers. Any data written into the status register will not change the TO or
PDF flag. In addition, operations related to the status register may give different results due to the
different instruction operations. The TO flag can be affected only by a system power-up, a WDT
time-out or by executing the
²CLR
WDT² or
²HALT²
instruction. The PDF flag is affected only by ex-
ecuting the
²HALT²
or
²CLR
WDT² instruction or during a system power-up.
The Z, OV, AC and C flags generally reflect the status of the latest operations.
·
C
is set if an operation results in a carry during an addition operation or if a borrow does not take
place during a subtraction operation; otherwise C is cleared. C is also affected by a rotate
through carry instruction.
·
AC
is set if an operation results in a carry out of the low nibbles in addition, or no borrow from the
high nibble into the low nibble in subtraction; otherwise AC is cleared.
·
Z
is set if the result of an arithmetic or logical operation is zero; otherwise Z is cleared.
·
OV
is set if an operation results in a carry into the highest-order bit but not a carry out of the high-
est-order bit, or vice versa; otherwise OV is cleared
·
PDF
is cleared by a system power-up or executing the
²CLR
WDT² instruction. PDF is set by ex-
ecuting the
²HALT²
instruction.
·
TO
is cleared by a system power-up or executing the
²CLR
WDT² or
²HALT²
instruction. TO is
set by a WDT time-out.
41
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