Chapter 1 Hardware Structure
codesec1 .section at 000h
¢code¢
org 0000h
;
;
;
;
Bank 1 code located here
this defines the offset from the
start address of Bank 1 which is
2000H
dc
000AAh, 011BBh, 022CCh, 033DDh, 044EEh, 055FFh
:
:
Because the TBLH register is a read-only register and cannot be restored, care should be taken to
ensure its protection if both the main routine and interrupt service routine use table read instruc-
tions. If using the table read instructions, the Interrupt Service Routines may change the value of
the TBLH and subsequently cause errors if used again by the main routine. As a rule it is recom-
mended that simultaneous use of the table read instructions should be avoided. However, in situa-
tions where simultaneous use cannot be avoided, the interrupts should be disabled prior to the
execution of any main routine table-read instructions. Note that all table related instructions re-
quire two instruction cycles to complete their operation.
Except HT49RU80/HT49CU80
Instruction
Table Location Bits
b12
b11
b10
b9
b8
PC8
1
b7
@7
@7
b6
@6
@6
b5
@5
@5
b4
@4
@4
b3
@3
@3
b2
@2
@2
b1
@1
@1
b0
@0
@0
TABRDC [m] PC12 PC11 PC10 PC9
TABRDL [m]
1
1
1
1
HT49RU80/HT49CU80
Instruction
Table Location Bits
b13
b12
b11
b10
b9
b8
b7
b6
@6
@6
b5
@5
@5
b4
@4
@4
b3
@3
@3
b2
@2
@2
b1
@1
@1
b0
@0
@0
TABRDC [m] TBHP TBHP TBHP TBHP TBHP TBHP @7
TABRDL [m]
1
1
1
1
1
1
@7
Note
1.
2.
3.
4.
PC12~PC8: Current Program Counter bits.
@7~@0: Table Pointer TBLPbits.
For the HT49RU80/HT49CU80, the Table address location is 14 bits, i.e. from b13~b0.
For the HT49R70A-1/HT49C70-1/HT49C70L, the Table address location is 13 bits, i.e. from
b12~b0.
5. For the HT49R50A-1/HT49C50-1/HT49C50L, the Table address location is 12 bits, i.e. from
b11~b0.
6. For the HT49R30A-1/HT49C30-1/HT49C30L, the Table address location is 11 bits, i.e. from
b10~b0.
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