LCD Type MCU
HT49R70A-1/HT49C70-1/HT49C70L
Pad Name
I/O
Options
Description
PA0/BZ
PA1/BZ
PA2
PA3/PFD
PA4~PA7
Bidirectional 8-bit input/output port. Each pin on this
port can be configured as a wake-up input by a con-
figuration option. Configuration options determine
whether pins PA0~PA3 are configured as CMOS out-
Wake-up
puts or NMOS input/output pins. If PA0~PA3 are con-
CMOS or NMOS figured as NMOS input/output pins, then pull-high
I/O
Pull-high
options are available but apply to all 4 pins, not indi-
PA0/PA1 or BZ/BZ vidual pins. Pins PA4~PA7 are always configured as
PA3 or PFD
NMOS input/output pins with pull-high resistors con-
nected. All inputs are Schmitt Trigger types. Pins
PA0, PA1 and PA3 are pin-shared with BZ, BZ and
PFD respectively, the function of which is chosen via
configuration options.
8-bit Schmitt Trigger input port. Each input pin is con-
nected to an internal pull-high resistor. Pins PB0 and
PB1 are pin-shared with INT0 and INT1 respectively.
Pins PB2 and PB3 are pin-shared with TMR0 and
TMR1 respectively.
Bidirectional 8-bit input/output port. Two configura-
tion options determine whether the four pins
PC0~PC3 and the four pins PC4~PC7 are configured
as CMOS outputs or NMOS input/output pins. Pins
must be configured as CMOS outputs or NMOS in-
put/output pins in blocks of four pins, individual pins
cannot be selected. If pins PC0~PC3 or PC4~PC7
are configured as NMOS input/output pins, then a
pull-high option is available for each block of four
pins. Individual pins cannot be selected to have a
pull-high option. All inputs are Schmitt Trigger types.
LCD power supply for HT49R70A-1/HT49C70-1.
LCD voltage pump for HT49C70L.
LCD voltage pump for HT49R70A-1/HT49C70-1.
LCD power supply for HT49C70L.
LCD voltage pump
The 1/4 LCD duty cycle configuration option will de-
termine whether pin COM3/SEG40 is configured as a
SEG40 segment driver or as a common COM3 output
driver for the LCD panel. COM0~COM2 are the LCD
common outputs.
LCD driver outputs for LCD panel segments
PB0/INT0
PB1/INT1
PB2/TMR0
PB3/TMR1
PB4~PB7
I
¾
PC0~PC7
I/O
CMOS or NMOS
Pull-high
VLCD
I
¾
¾
¾
V2
V1, C1, C2
I
I
COM0~COM2
COM3/SEG40
O
1/2, 1/3 or 1/4
Duty
SEG0~SEG39
O
¾
12
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