LCD Type MCU
Selection Table
The series of LCD Type microcontrollers include a comprehensive range of features, some of
which are standard and some of which are device dependent. Most features are common to all de-
vices, the main features distinguishing them are Program Memory, Data Memory capacity, LCD
segment count and timer functions, etc. To assist users in their selection of the most appropriate
device for their application, the following table, which summarizes the main features of each de-
vice, is provided.
Part No.
VDD
Program Data
Memory Memory
2K´14
96´8
I/O
14
LCD
19´2
19´3
18´4
33´2
33´3
32´4
Timer
8-bit´1
Int.
5
UART
¾
Stack
4
Package
Types
48SSOP
HT49R30A-1
2.2V~5.5V
HT49C30-1
HT49C30L
1.2V~2.2V
HT49R50A-1
2.2V~5.5V
HT49C50-1
HT49C50L
1.2V~2.2V
HT49R70A-1
2.2V~5.5V
HT49C70-1
HT49C70L
HT49RU80
HT49CU80
1.2V~2.2V
4K´15
160´8
20
8-bit´2
6
¾
6
48SSOP,
100QFP
8K´16
224´8
24
41´2
8-bit´1
41´3
16-bit´1
40´4
48´2
8-bit´1
48´3
16-bit´2
47´4
6
¾
16
100QFP
2.2V~5.5V 16K´16
576´8
31
8
Ö
16
100QFP
Note
1. Part numbers including
²C²
are mask version devices,
²R²
are OTP devices.
2. Part numbers including
²L²
are low voltage mask version devices.
3. For the HT49R50A-1/HT49C50-1/HT49C50L devices, the above table shows the values for the
100-pin QFP package. For the 48-pin SSOP package, there are 8 I/O and 6 input pins, 19´3
LCD or 18´4 LCD driver pins.
Block Diagram
The following block diagram illustrates the main functional blocks of the LCD Type microcontroller
series of devices.
S y s te m R C /
X 't a l O s c illa t o r
P ro g ra m
C o u n te r
A d d re s s D e c o d e r
R T C
O S C
W D T
O s c illa to r
T im in g
G e n e ra to r
In s tr u c tio n
D e c o d e r
In s tr u c tio n
R e g is te r
P ro g ra m
M e m o ry
S ta c k
S ta c k P o in te r
A d d re s s D e c o d e r
L C D
M e m o ry
D a ta
M e m o ry
M
U
X
M e m o ry
P o in te r
M U X
A C C
L o o k -u p
T a b le
R e g is te r
L o o k -u p
T a b le
P o in te r
T o P ro g ra m
M e m o ry
U A R T
C o n fig u r a tio n
O p tio n
B a n k
P o in te r
A L U
S h ifte r
L C D D r iv e r s
C O M
S E G
R e s e t &
L V R /L V D
C o n fig . W a tc h d o g
R e g is te r
T im e r
C o n fig . T im e r ( s ) /
R e g is te r C o u n te r
P F D
B u z z e r
D r iv e r
C o n fig . In te r r u p t
R e g is te r C ir c u it
C o n fig . I/O
R e g is te r P o r ts
D e v ic e
P r o g r a m m in g
C ir c u itr y
6
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