Chapter 1 Hardware Structure
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Table Read Function
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Multi-level Hardware Stack:
4-level (HT49R30A-1/HT49C30-1/HT49C30L)
6-level (HT49R50A-1/HT49C50-1/HT49C50L)
16-level (HT49R70A-1/HT49C70-1/HT49C70L, HT49RU80/HT49CU80)
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Bit Manipulation Instructions
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63 Powerful Instructions
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Most Instructions Implemented in 1 Machine Cycle
Peripheral Features
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From 6 to 8 Input Pins with Pull-high Resistors
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From 8 to 16 Bidirectional I/O with Pull-high Options
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7 Output Pins (HT49RU80/HT49CU80)
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Internal LCD Driver
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Internal Dedicated LCD Memory
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Port A Wake-up Options
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One, Two or Three Event Counter Inputs with Internal Interrupt
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Universal Asynchronous Receiver/Transmitter, UART (HT49RU80/HT49CU80)
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Two External Interrupt Inputs
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Full Timer Functions with Internal Interrupt
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Watchdog Timer (WDT)
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HALT and Wake-up Feature for Power Saving Operation
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PFD Output
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Buzzer Driver Outputs
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On-chip Crystal, RC and 32768Hz Crystal Oscillator
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32768Hz Real Time Clock (RTC) Function
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Low Voltage Reset/Detector (LVR/LVD) Feature for Brown-out Protection
(Except HT49C30L/HT49C50L/HT49C70L)
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Mask Version Devices Available for High Volume Production
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Programming Interface with Code Protection
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Low Voltage Devices Available for Single Cell Battery Operation
(Only HT49C30L/HT49C50L/HT49C70L)
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Full Suite of Supported Hardware and Software Tools Available
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