HAT2016R
Target Specification
Silicon N Channel Power MOS FET
2nd. Edition
May. 1995
Preliminary
Application
High speed power switching
SOP–8
8
5
7 6
Features
Low on–resistance
Capable of 4V gate drive
Low drive current
High density mounting
7 8
D D
3
1 2
5 6
D D
4
2
G
4
G
Ordering Information
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Hitachi Code
EIAJ Code
JEDEC Code
FP–8DA
MS–012AA
S1
S3
1, 3
Source
2, 4
Gate
5, 6, 7, 8 Drain
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Table 1 Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Channel dissipation
Channel dissipation
Channel temperature
Storage temperature
Symbol
V
DSS
MOS1
MOS2
Ratings
30
±20
5
20
2.0
1.3
150
–55 to +150
Unit
V
V
A
A
W
W
°C
°C
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Pch***
Pch**
Tch
Tstg
I
D(pulse)
*
I
D
V
GSS
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*
PW
10 µs, duty cycle
1 %
**
1 Drive operation :
***
2 Drive operation When using surface mounted on FR4 board
1
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