ADE–208–366 (Z)
HAT2007F
Silicon N Channel Power MOS FET
2nd. Edition
May 1995
Application
Power switching
synchronously Rectifier
SOP–8
8
5
7 6
Features
•
•
•
•
Low on–resistance
Capable of 4V gate drive
Low drive current
High density mounting
5 6 7 8
D D D D
3
1 2
4
4
G
Ordering Information
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Hitachi Code
EIAJ Code
JEDEC Code
FP–8D
SC–527–8A
—
S S
2 3
1
2, 3
4
5, 6, 7, 8
N/C
Source
Gate
Drain
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Table 1 Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Body–drain diode reverse drain current
Channel dissipation
Channel temperature
Storage temperature
Symbol
V
DSS
Ratings
30
±20
4
16
4
1
150
–55 to +150
Unit
V
V
A
A
A
W
°C
°C
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Pch**
Tch
Tstg
I
DR
I
D(pulse)
*
I
D
V
GSS
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*
PW
≤
10 µs, duty cycle
≤
1 %
**
When using the glass epoxy board (40
x
40
x
1.6 mm)
1