2SJ363
Silicon P Channel MOS FET
Application
UPAK
Low frequency power switching
1
32
Features
• Low on–resistance
• Low drive current
• 4 V gate drive device can be driven from
5 V source
4
D
G
1. Gate
2. Drain
3. Source
4. Drain
S
Table 1 Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Body–drain diode reverse drain current
Channel dissipation
Channel temperature
Storage temperature
Symbol
V
DSS
Ratings
–30
±20
–2
–4
–2
1
150
–55 to +150
Unit
V
V
A
A
A
W
°C
°C
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Pch**
Tch
Tstg
I
DR
I
D(pulse)
*
I
D
V
GSS
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*
PW
≤
100 µs, duty cycle
≤
10 %
**
Value on the alumina ceramic board (12.5
x
20
x
0.7mm)
***
Marking is “PY”.
1