Hitachi IGBT Module Application Manual
Figure 45 shows that the gate voltage v
ge
follows the relationship indicated below (where
f
1
and
f
2
represent functions):
Equation 40:
Equation 41:
v
ge
v
ge
f
1
(I
C
)
f
2
(1/T
J
)
Here,
T
D’
in Equation 39 is on a downward trend in the case of a low collector current or a high IGBT
module junction temperature. In the case of the Hitachi GS Series, it is sufficient to consider (at I
C
approximately 0 A and T
j
= 125 deg. C.) that V
th
(on) = 5V and V
th
(off) = 5V as the bottom limits.
Note:
1) In a module consisting of IGBT chips in parallel, the gate of each
IGBT chip is connected to a resistor chip in series. These resistors
are generally composed of semiconductor resistors, so that these
temperature factors are rather high: about 1% per degree. If the
module has a high temperature, the R
G
in Equation 39 becomes
equivalently high and the dead time
T
D’
may become short.
2) When extremely narrow control is conducted, and in the case of
narrow off control, for example, voltage applied to the gate may not
reach the source voltage of the driver, may be applied only at close
to 0 Volts, and may be transferred to turn-OFF. Thus, if the gate
voltage does not reach the source voltage of the driver, the t
d
(on)
and t
d
(off) can be determined by performing calculations with the
V
GN
and V
GP
replaced with real values applied to the gate in
Equations 35 and 36.
Note:
5.7.3.3
Determinations of Gate Charge Values
The value for Q
GC
in Equation 39 can be determined for each of the rated collector currents by means
of Figure 46.
Figure 46. Gate Charge Q
GC
Values
Because logic dead time varies due to several factors, use dead time values obtained in Equation 39 to
establish a setting that assures sufficient leeway.
42
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