General Parameters
Table 8. Clock AC Timing Specifications
At recommended operating conditions. See
Maximum Processor Core Frequency (MHz)
Characteristic
Symbol
1000N
Min
Processor frequency
DFS mode disabled
Processor frequency
DFS mode enabled
VCO frequency
f
core
f
core
_
DFS
f
VCO
500
Max
1000
1267N
Min
500
Max
1267
1400N
Min
500
Max
1400
1700L
Min
600
Max
1700
MHz
1, 8, 9
Unit
Notes
250
500
250
633
250
700
300
850
MHz
10
500
1000
500
1267
500
1400
600
1700
MHz
1, 9
Notes:
1.
Caution:
The SYSCLK frequency and PLL_CFG[0:5] settings must be chosen such that the resulting SYSCLK (bus)
frequency, processor core frequency, and PLL (VCO) frequency do not exceed their respective maximum or minimum
operating frequencies. Refer to the PLL_CFG[0:5] signal description in
Section 9.1.1, “PLL Configuration,”
in the hardware
specifications for valid PLL_CFG[0:5] settings.
8. This reflects the maximum and minimum core frequencies when the dynamic frequency switching feature (DFS) is disabled.
f
core_DFS
provides the maximum and minimum core frequencies in a DFS mode.
9.
Caution:
These values specify the maximum processor core and VCO frequencies when the device is operated at the
nominal core voltage. If operating the device at the derated core voltage, the processor core and VCO frequencies must be
reduced. See
for more information.
10.This specification supports the Dynamic Frequency Switching (DFS) feature and is applicable only when one of the DFS
modes (divide-by-2 or divide-by-4) is enabled. When DFS is disabled, the core frequency must conform to the maximum and
minimum frequencies stated for f
core
.
5.3
Voltage and Frequency Derating
To reduce power consumption, these devices support voltage and frequency derating in which the core
voltage (V
DD
) may be reduced if the reduced maximum processor core frequency requirements are
observed. The supported derated core voltage, resulting maximum processor core frequency (f
core
), and
power consumption are provided in
Only those parameters in
are affected; all other
parameter specifications are unaffected.
Table 11. Supported Voltage, Core Frequency, and Power Consumption Derating
Maximum Rated
Core Frequency
(Device Marking)
1000N
1267N
1400N
1700L
1.0 V ± 50 mV
1.0 V ± 50 mV
1000 MHz
1000 MHz
N/A
Supported
Derated Core
Voltage (V
DD
)
Maximum Derated
Core Frequency
(f
core
)
Full-Power Mode Power Consumption
Typical
N/A
6.0 W
8.0 W
7.3 W
9.9 W
8.5 W
11.5 W
Thermal
Maximum
MPC7448 Hardware Specifications Addendum for the MC7448Txxnnnnmx Series, Rev. 2
Freescale Semiconductor
5